EDN

Instruction Set Architecture

Instruction Set Architecture (ISA) is a set of instructions defined for the processor’s architecture. These are the instructions that the processor understands. It defines the hardware and software ...
Semiconductor Engineering

Dual Instruction-Set Architecture, Supporting A TTA And RISC-V Instruction Set Via a Lightweight Microcode Hardware Unit

A technical paper titled “Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode” was published by researchers at Tampere University. “Transport triggered architectures ...

Deep Dive into ISA: What is the difference between x86 and ARM? CISC vs RISC decoding structures and the 'physics of instruction sets'

The information in this article is current as of October 2026.In recent years, a heated debate has been ongoing in the PC and ...
TechNode

SILICON | Loongson promises self-reliance with new architecture

Every Wednesday and Friday, TechNode’s Briefing newsletter delivers a roundup of the most important news in China tech, straight to your inbox. Sign up Last week, Chinese processor company Loongson ...
ZDNet

Rediscovering RISC-V: Apple M1 sparks renewed interest in non-x86 architectures

RISC-V is, like x86 and ARM, an instruction set architecture (ISA). Unlike x86 and ARM, it is a free and open standard that anyone can use without getting locked into someone else's processor designs ...
SiliconANGLE

Arm moves to cancel Qualcomm’s instruction set architecture license

Arm Holdings plc plans to cancel a license that gives Qualcomm Inc. permission to use its instruction set architecture in chips. Bloomberg reported the development today. Qualcomm, the world’s top ...
Liliputing

Chinese chip maker Loongson has designed its own CPU instruction set architecture (ISA)

Chinese chip maker Loongson used to make processors based on MIPS architecture, but MIPS isn’t what it used to be and the company that developed the technology has even pivoted to making chips using ...
Semiconductor Engineering

Implementing Cryptographic Algorithms for the RISC-V Instruction Set Architecture in Two Cases

This new technical paper titled “Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms” was published by researchers at Intel, North Arizona University and Google, with ...
AppleInsider

Apple investigating RISC-V instruction set architecture, job listing shows

A job listing posted to Apple's website this week reveals the company is researching RISC-V instruction set architecture solutions, suggesting future in-house chip designs might implement the ...
Hackaday

instruction set architecture

An Instruction Set Architecture (ISA) defines the software interface through which for example a central processor unit (CPU) is controlled. Unlike early computer systems which didn’t define a ...
Hackaday

instruction set

When it comes to PCs, Westerners are most most familiar with x86/x64 processors from Intel and AMD, with Apple Silicon taking up a significant market share, too. However, in China, a relatively new ...
Ars Technica

Instruction Set Architecture (ISA)

Back in the early days of computing, manufacturers didn’t build a whole line of software-compatible computer systems where each system was aimed at a different price/performance point. Instead, each ...